Struct nrf52::spi::SPIM [] [src]

pub struct SPIM {
    registers: *const SPIM,
    client: Cell<Option<&'static SpiMasterClient>>,
    chip_select: Cell<Option<&'static Pin>>,
    initialized: Cell<bool>,
    busy: Cell<bool>,
    tx_buf: TakeCell<'static, [u8]>,
    rx_buf: TakeCell<'static, [u8]>,
    transfer_len: Cell<usize>,
}

A SPI master device.

A SPIM instance wraps a registers::spim::SPIM together with addition data necessary to implement an asynchronous interface.

Fields

Methods

impl SPIM
[src]

[src]

[src]

[src]

[src]

Configures an already constructed SPIM.

[src]

Enables SPIM peripheral.

[src]

Disables SPIM peripheral.

[src]

Trait Implementations

impl SpiMaster for SPIM
[src]

[src]

[src]

[src]

[src]

Perform an asynchronous read/write operation, whose completion is signaled by invoking SpiMasterClient on the initialized client. write_buffer must be Some, read_buffer may be None. If read_buffer is Some, the length of the operation is the minimum of the size of the two buffers. Read more

[src]

[src]

[src]

[src]

Tell the SPI peripheral what to use as a chip select pin. The type of the argument is based on what makes sense for the peripheral when this trait is implemented. Read more

[src]

Returns the actual rate set

[src]

[src]

[src]

[src]

[src]

[src]

[src]